NE555 — three bench projects

Reference setup

NE555P in PDIP8, isolated bench supply set to 5.00 V with current limiting. Use short connections, a multimeter and an oscilloscope with suitable probes. These are bench projects; none of their outputs controls a transmitter.

START pulls TRIG low. Release it well before the timed interval ends; otherwise the output can stay high. RESET has priority. This is neither a safety timer nor a command memory.

Circuit schematic

Identical labels indicate the same electrical net even when a wire is not drawn between cells. Every terminal is identified. Capacitor + signs show polarity; NC marks an unconnected pin. The JSON netlist is the wiring reference.

Bill of materials

Pinout and layout

NE555 PDIP8, top view: 1 GND, 2 TRIG, 3 OUT, 4 RESET, 5 CONT, 6 THRES, 7 DISCH, 8 VCC. Check the notch, package and manufacturer pinout before insertion. Potentiometer terminal names describe their function, not a universal physical order.

Place CDEC close to pins 8 and 1, and CCONT close to pin 5. Keep TIMING and TRIGGER wiring short. Audio load returns must not share the sensitive input return path. No qualified PCB is supplied.

Assembly steps

1. With power off, identify sockets and check values. Keep ICs out of their sockets during continuity checks.
2. Wire J1, grounds and supply capacitors. Check for shorts and correct polarity.
3. Wire NE555 pins from the netlist, then CCONT and the timing network.
4. Join pins 6 and 7 at TIMING; connect RT to V5 and CT positive to TIMING. Keep TRIG separate with its RTRIG pull-up to V5.
5. Add START, STOP and the LED with RLED. The cathode goes to GND. Do not substitute a relay or another load for the LED.
6. Check every net, switch power off, insert ICs with the correct orientation and prepare test points.

First power-up

1. Set 5.00 V and an initial 50 mA current limit. Power up; stop for persistent limiting, rapid heating or incorrect voltage. Connect probe grounds only to TP0/GND.
2. After power-up, press and release STOP to establish idle. With START released, check TRIG high, OUT low and CT discharged.
3. Tap START and release promptly. Measure TP3 pulse duration, CT charging at TP2 and its return to idle. Compare with nominal 1.1 s without treating it as a guaranteed tolerance.
4. During a pulse, press STOP: OUT should go low. Also verify that holding START does not follow the normal timing; document this case instead of treating it as an equation error.
5. Record levels, settings and instruments. These test points are for this dossier measurements, not an unknown input or a transmitter.

Troubleshooting

1. Excess current or heating: switch off and check rails, orientation, polarity and shorts before trying again.
2. No activity: verify the actual PDIP8 pinout, V5 and GND, then RESET, TRIG and THRES. Measure these before replacing the IC.
3. LED stays on too long: check START is released, TRIG is high, CT has the right value, and there is no leakage or wiring error.
4. No pulse: check RESET high and TRIG falling below its threshold during a short press. Check LED polarity separately from TP3 waveform.
5. Erratic behaviour: shorten wiring and check local decoupling, grounds and contacts. Sound or an LED cannot rule out parasitic oscillation.

Calculations and assumptions

Duration is set by RT and CT; CT tolerance and leakage may dominate. The RC-only interval in the JSON excludes NE555 threshold and temperature variation. TRIG must be high again at least 10 µs before the interval ends.

t ≈ 1.1 RT CT = 1.1 × 100 kΩ × 10 µF ≈ 1.1 s

TRIG < VCC/3 starts; TRIG must return high ≥10 µs before timing ends

RESET low overrides; OUT low; timing capacitor discharged

ILED ≤ (5 − 1.6)/2.2 kΩ ≈ 1.55 mA

Nominal analytical values exclude full tolerances, capacitor leakage and device variation. A calculated range is not a manufacturer guarantee. Record actual measurements on the blank worksheet.

Measurement worksheet

Record supply voltage, current, fitted components, test points and waveforms. The supplied worksheet is blank and contains no prefilled results.

Supply and current

________________________________________

Frequency / duration / duty cycle

________________________________________

Output levels and load

________________________________________

Instruments, observations, decision

________________________________________

Dossier files

• Circuit schematic · SVG
• Netlist and design · JSON
• Calculations and assumptions · JSON
• Bill of materials · CSV
• Localized instructions · TXT
• Measurement worksheet · CSV

Manufacturer sources

• Texas Instruments NE555 — SLFS022K, March 2026

French source and agent-reviewed English pivot; other languages use machine translation with field and technical-token checks. No professional linguistic review is claimed. Schematics and netlists are shared across languages.